FS6407 datasheet(62/111 Pages) NXP

62 / 111 page

NXP Semiconductors

FS6407/FS6408

The device contains several registers. Their address is coded on 7 bits (bits 15 to 9). Each register controls or reports part of the device

function. Data can be written to the register, to control the device operation or set default value or behavior. Every register can also be

read back to ensure its content (default setting or value previously written) are correct.

7.1.4

Although the minimum time between two NCS low sequences is defined by tONNCS (Figure 48), two consecutive accesses to the fail-safe

registers must be done with a 3.5 µs minimum NCS high time in between. Although the minimum time between two fail-safe registers

accesses is 3.5 µs, some SPI accesses to the main registers can be done in between (Figure 48).

7.2

Detail operation

Figure 48. MOSI / MISO SPI command organization

Table 12. MOSI bits description

R / W

Description

Set if it is a READ or WRITE Command

READ

1WRITE

M / FS

Description

Split the addresses between Fail-safe state machine and main Logic

0Main

1Fail-safe

A4:0

Description

Set the address to Read or Write

See Register Mapping

Description

Parity bit (only use in Write mode). Set to 0 in Read mode

Number of “1” (bit15:9 and bit 7:0) is odd

Number of “1” (bit15:9) and bit 7:0) is even

D7:0

Description

Data in Write mode. Must be set to 00h in Read mode

See Register Details

FS6407 데이터시트(PDF) 62 Page - NXP Semiconductors