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FS6407 데이터시트(PDF) 47 Page - NXP Semiconductors

부품명 FS6407
상세설명  Power system basis chip with high speed can transceiver
PDF  111 Pages
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제조업체  NXP [NXP Semiconductors]
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FS6407 데이터시트(HTML) 47 Page - NXP Semiconductors

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FS6407/FS6408
6.7.1.4
Overcurrent detection and current limitation
6.7.1.4.1
Overcurrent protection:
In order to ensure the integrity of the high-side MOSFET, an overcurrent detection is implemented. The regulator is switched OFF by the
main state machine when the overcurrent detection threshold IPRE_OC is reached three consecutive times. The overcurrent detection is
blanked when the pass transistor is switched ON during TPRE_OC to avoid parasitic switch OFF of the high-side gate driver.
The VPRE output voltage decrease causes an undervoltage condition on one of the cascaded regulators (VCORE, VCCA, VAUX) and
bring the device in Fail-safe state. The overcurrent protects the regulator in case of SW_PRE pin shorted to GND. The overcurrent works
in Buck mode only.
6.7.1.4.2
Current limitation:
A current limitation is also implemented to avoid uncontrolled power dissipation inside the device (duty cycle control) and limits the current
below IPRE_LIM. The current limitation is blanked when the pass transistor is switched ON during TPRE_BLK_LIM to allow short-circuit
detection on SW_PRE pin.
When IPRE_LIM threshold is reached during Buck mode, the high-side integrated MOSFET is switched OFF. When IPRE_LIM threshold is
reached during Boost mode, the external low-side MOSFET is switched OFF. In both cases, the MOSFET is not switched ON again before
the next rising edge of the switching clock.
The current limitation induces a duty cycle reduction and leads to the VPRE output voltage to fall down gradually. This may cause an
undervoltage condition on one of the cascaded regulators (VCORE, VCCA, VAUX) and bring the device into Fail-safe state. The current
limitation does not switch OFF the regulator. The current limitation protects the regulator when VPRE pin is shorted to GND.
Figure 31. Overcurrent and current limitation scheme
SW_PRE
IPRE_OC
IPRE_LIM
IPRE_SW
TPRE_BLK_ILIM
TPRE_OC
VPRE



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