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ZAMC4100GA2R 데이터시트(PDF) 52 Page - Renesas Technology Corp |
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ZAMC4100GA2R 데이터시트(HTML) 52 Page - Renesas Technology Corp |
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52 / 156 page ![]() ZAMC4100 Datasheet © 2016 Integrated Device Technology, Inc. 52 January 26, 2016 Table 3.8 IRQCTRL Register Bits Description Bit Description 7 WDTIE: Watchdog timer interrupt enable bit during STANDBY Mode. 1 = WDT interrupt is enabled. 0 = WDT interrupt is disabled. Note: This interrupt is generated only when the system is in STANDBY Mode. 6 OVTIE: Over-temperature interrupt enable bit. 1 = OVT interrupt is enabled. 0 = OVT interrupt is disabled. Important: If an over-temperature event occurs, the drivers will be shut down automatically regardless of the interrupt enable bit status. 5 SEIE: Supply error (over-voltage or under-voltage) interrupt enable bit. 1 = Supply error interrupt is enabled. 0 = Supply error interrupt is disabled. 4 ADCTIE: Global ADC interrupt enable bit. 1 = ADC interrupt is enabled. 0 = ADC interrupt is disabled. 3 HBOCIE: Global half-bridge driver over-current interrupt enable bit. 1 = Half-bridge driver over-current interrupt is enabled. 0 = Half-bridge driver over-current interrupt is disabled. 2 HSOCIE: Global high-side driver over-current interrupt enable bit. 1 = High-side driver over-current interrupt is enabled. 0 = High-side driver over-current interrupt is disabled. 1 ECMOCIE: Electrochromatic mirror (ECM) driver over-current interrupt enable bit. 1 = ECM over-current interrupt is enabled. 0 = ECM over-current interrupt is disabled. 0 LINIE: Global LIN PHY interrupt enable bit. 1 = LIN PHY interrupt is enabled. 0 = LIN PHY interrupt is disabled. |
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