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ZAMC4100GA2R 데이터시트(PDF) 104 Page - Renesas Technology Corp

부품명 ZAMC4100GA2R
상세설명  Actuator and Motor Controller
PDF  156 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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ZAMC4100 Datasheet
© 2016 Integrated Device Technology, Inc.
104
January 26, 2016
4.2.
Memory Organization
The MCU contains two memory blocks: FLASH (program) memory and SRAM (data) memory. Together with the
peripheral and system registers, their addresses are mapped as shown in Table 4.1. By default, the flash is
mirrored to address 0x0. Software can change this and mirror the SRAM to address 0x0 instead by writing to the
register field MEMSWAP in register SYS_MEMPORTCFG (see Table 4.6).
Table 4.1
MCU Memory Map
Address
Description
0xFFFF_FFFF
Reserved
0xE010_0000
0xE00F_FFFF
Private Peripheral Bus; see the ARM® CORTEX™-M0 documentation for details
0xE000_0000
0xDFFF_FFFF
Reserved
0x4000_1C00
0x4000_1BFF
(SPI, SW-LIN)
0x4000_1800
0x4000_17FF
GPIO
0x4000_1400
0x4000_13FF
32-Bit Timer
0x4000_1000
0x4000_0FFF
FLASH Info Page
0x4000_0C00
0x4000_0BFF
FLASH Controller
0x4000_0800
0x4000_07FF
Reserved
0x4000_0400
0x4000_03FF
System Management Unit
0x4000_0000
0x3FFF_FFFF
Reserved
0x2000_0800
0x2000_07FF
SRAM Bank 2KB
0x2000_0000
0x1FFF_FFFF
Reserved
0x1000_8000
0x1000_7FFF
FLASH Bank 32KB
0x1000_0000
0x0FFF_FFFF
Reserved
0x0000_0000



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