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S75WS256NDFBAWMB 데이터시트(PDF) 56 Page - SPANSION |
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S75WS256NDFBAWMB 데이터시트(HTML) 56 Page - SPANSION |
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56 / 216 page ![]() 54 S75WS256Nxx Based MCPs S75WS-N-00_A0 February 17, 2005 Ad van c e Inf o rmation Notes 1. Each PPB is individually programmed and all are erased in parallel. 2. While programming PPB for a sector, array data can be read from any other bank, except Bank 0 (used for Data# Polling) and the bank in which sector PPB is being programmed. 3. Entry command disables reads and writes for the bank selected. 4. Reads within that bank return the PPB status for that sector. 5. Reads from other banks are allowed while writes are not allowed. 6. All Reads must be performed using the Asynchronous mode. 7. The specific sector address (A23-A14 WS256N, A22-A14 WS128N, A21-A14 WS064N) are written at the same time as the program command. 8. If the PPB Lock Bit is set, the PPB Program or erase command does not execute and times- out without programming or erasing the PPB. 9. There are no means for individually erasing a specific PPB and no specific sector address is required for this operation. 10. Exit command must be issued after the execution which resets the device to read mode and re-enables reads and writes for Bank 0 11. The programming state of the PPB for a given sector can be verified by writing a PPB Status Read Command to the device as described by the flow chart shown in Figure 9.2. |
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