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UPD61P24CS 데이터시트(PDF) 7 Page - Renesas Technology Corp |
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UPD61P24CS 데이터시트(HTML) 7 Page - Renesas Technology Corp |
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7 / 38 page ![]() µPD61P24 5 3. PROGRAM MEMORY (ROM) ……… 1002 STEPS × 10 BITS The program memory (ROM) is configured in 10 bits steps. It is addressed by the program counter. Program and table data are stored in the program memory. Figure 3-1. Program Memory Map Test program area 000H 0FFH 100H 1FFH 200H 2FFH 300H 3E9H 3EAH 3FFH 4. DATA MEMORY (RAM) ……… 32 WORDS × 5 BITS The data memory is a RAM of 32 words × 5 bits. The data memory stores processing data. In some cases, the data memory is processed in 8-bit units. R0 may be used as the data pointer for the ROM. After power application, the RAM will be undefined. The RAM retains the previous data on reset. Figure 4-1. Data Memory Organization 1 R0 0 RF RB RC SP–3 SP–2 SP–1 SP–0 .. . .. . Caution Avoid using the RAM areas RD, RE, and RF in a CALL routine as much as possible because these areas are also used as stack memory areas (to prevent program hang-up in case the value of the SP is destroyed due to some reason such as noise). When using these RAM areas as general-purpose RAM areas, be sure to include stack pointer checking in the main routine. |
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