µPD61P24

20

17.3

Program Memory Reading Procedure

(1) Pull down the pins not used to GND via resistor. Keep the CLK pin low.

(2) Supply 5 V to the VDD pin. Keep the VPP pin low.

(3) Wait for 10

µs, and supply 5 V to the VPP pin.

(4) Set the mode in which the program memory address is cleared to 0, by using the mode setting pins.

(5) Supply 6 V to VDD and 12.5 V to VPP.

(6) Set the program inhibit mode.

(7) Set the verify mode. If a clock pulse is input to the CLK pin, the data of one address is output each time the

pulse has been input to the CLK pin four times.

(8) Set the program inhibit mode.

(9) Set the mode in which the program memory address is cleared to 0.

(10) Change the voltage on the VDD and VPP pins to 5 V.

(11) Turn off power supply.

Program memory reading steps (2) through (9) are illustrated below.

Hi-Z

Hi-Z

“ L ”

MD3

MD2

MD1

MD0

D0-D7

CLK

GND

VDD

VDD

VPP

VPP

VDD

GND

VDD+1

Reset

Data output

Data output