STE10A datasheet(68/82 Pages) STMICROELECTRONICS

부품명	STE10A

상세설명	PCI 10/100 Ethernet controller with integrated PHY (3.3V)

PDF	82 Pages

Scroll/Zoom	100%

제조업체	STMICROELECTRONICS [STMicroelectronics]

홈페이지	http://www.st.com

Logo

68 / 82 page

Registers and descriptors description

STE10/100A

68/82

4.4.2

Transmit descriptor

Table 13.

Receive descriptor table

TDES0

Own

Status

TDES1

---

Control

Buffer2 byte-count

Buffer1 byte-count

TDSE2

Buffer1 address

TDSE3

Buffer2 address

Table 14.

Transmit descriptor description

Bit#

Name

Description

TDSE0

OWN

Own bit

1: Indicates this descriptor is ready to transmit

0: No transmit data in this descriptor.

30-24

---

Reserved

23-22

Under-run count

21-16

---

Reserved

Error summary. Logical OR of the following bits:

1: under-run error

8: excessive collision

9: late collision

10: no carrier

11: loss carrier

14: jabber time-out

Transmit jabber time-out

13-12

-----

Reserved

Loss of carrier

No carrier

Late collision

Excessive collision

Heartbeat fail

6-3

Collision count

-----

Reserved

Under-run error

Deferred

TDES1

Interrupt completed

Last descriptor

STE10A 데이터시트(PDF) 68 Page - STMicroelectronics

STE10A 데이터시트(HTML) 68 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

데이터시트 다운로드

링크 URL