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AMC131M01DFMR 데이터시트(PDF) 37 Page - Texas Instruments |
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AMC131M01DFMR 데이터시트(HTML) 37 Page - Texas Instruments |
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37 / 81 page ![]() result and does not provide another DRDY pulse until the second following instance when data are ready because of how the pulse is generated. See the Collecting Data for the First Time or After a Pause in Data Collection section for more information about the behavior of DRDY when data are not consistently read. 8.5.1.6 Conversion Synchronization or System Reset (SYNC/RESET) The SYNC/RESET pin is a multifunction digital input pin that serves primarily to allow the host to synchronize conversions to an external process or to reset the device. See the Synchronization section for more details regarding the synchronization function. See the SYNC/RESET Pin section for more details regarding how the device is reset. 8.5.1.7 SPI Communication Frames SPI communication on the AMC131M01 is performed in frames. Each SPI communication frame consists of several words. The word size is configurable as either 16, 24, or 32 bits by programming the WLENGTH[1:0] bits in the MODE register. The interface is full duplex, meaning that the interface is capable of transmitting data on DOUT while simultaneously receiving data on DIN. The input frame that the host sends on DIN always begins with a command. The first word on the output frame that the device transmits on DOUT always begins with the response to the command that was sent in the previous input frame. The number of words in a command depends on the command provided. For most commands, there are three words in a frame. On DIN, the host provides the command, the command CRC if input CRC is enabled or a word of zeros if input CRC is disabled, and one additional word of zeros. Simultaneously on DOUT, the device outputs the response from the previous frame command, one word of ADC data representing the single ADC channel, and a CRC word. If The ADC is disabled, this frame structure of three words still applies, and the data of the disabled channel reads all zeros. Figure 8-19 shows a typical command frame structure. DRDY CS SCLK DIN DOUT Channel 0 Data CRC Response Hi-Z Hi-Z Channel 0 Data Response Command CRC Command CRC Figure 8-19. Typical Communication Frame There are some commands that require more than three words. In the case of a read register (RREG) command where multiple registers are read, the response to the command contains the acknowledgment of the command followed by the register contents requested, which can require a larger frame depending on how many registers are read. See the RREG section for more details on the RREG command. www.ti.com AMC131M01 SBASA57 – SEPTEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: AMC131M01 |
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