AMC131M01DFMR datasheet(17/81 Pages) TI

17 / 81 page

8 Detailed Description

8.1 Overview

The AMC131M01 is an isolated, low-power, single-channel, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter

(ADC) with a low-drift internal voltage reference and an integrated DC/DC converter that allows the device to

be supplied from a single 3.3-V or 5-V voltage supply source on the primary (low) side. The dynamic range,

size, feature set, and power consumption are optimized for cost-sensitive applications requiring simultaneous

sampling.

The silicon-dioxide (SiO2)-based capacitive isolation barrier supports a high level of magnetic field immunity, as

described in the ISO72x Digital Isolator Magnetic-Field Immunity application note.

An integrated negative charge pump allows absolute input voltages as low as 1.3 V below HGND, which

enables measurements of input signals varying around ground with a single-ended power supply. The device

features a programmable gain amplifier (PGA) with gains up to 128. An integrated input precharge buffer

enabled at gains greater than 4 provides high input impedance at high PGA gain settings. The ADC receives the

reference voltage from an integrated 1.2-V reference. The device allows differential input voltages as large as

the reference. Two power-scaling modes allow designers to trade power consumption for ADC dynamic range.

The AMC131M01 contains a digital decimation filter that demodulates the output of the ΔΣ modulator. The filter

enables data rates as high as 64 kSPS in high-resolution mode. Offset and gain calibration registers can be

programmed to automatically adjust output samples for measured offset and gain errors. The Functional Block

Diagram provides a detailed diagram of the AMC131M01.

The device communicates via a serial programming interface (SPI)-compatible interface. Several SPI commands

and internal registers control the operation of the AMC131M01. Other devices can be added to the same SPI

bus by adding discrete CS control lines. The SYNC/RESET pin can synchronize conversions between multiple

AMC131M01 devices and maintains synchronization with external events.

8.2 Functional Block Diagram

Low side supply

(3.0 V to 5.5 V)

DVDD

DCDC_CAP

DGND

SCLK

DOUT

DIN

DRDY

SYNC/RESET

CLKIN

GND

Resonator and

Driver

LDO

Rectifier

Control &

Serial

Interface

1.2-V

Reference

ADC

Gain &

Offset

Calibration

Phase

Shift &

Digital

Filter

Clock

Generation

HLDO_OUT

DCDC_OUT

DCDC_HGND

HGND

AIN0N

AIN0P

ISO GND

HLDO_IN

Ferrite

GPO

–

www.ti.com

AMC131M01

SBASA57 – SEPTEMBER 2023

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