XRT86VL34 datasheet(27/156 Pages) EXAR

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XRT86VL34

REV. V1.2.0

QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

CRC-6 Bits Source

Select

R/W

CRC-6 Bits Source Select

This bit permits the user to specify the source of the CRC-6 bits,

within the outbound T1 data-stream, as depicted below.

0 - Configures the Transmit T1 Framer block to internally compute

and insert the CRC-6 bits within the outbound T1 data-stream.

1 - Configures the Transmit T1 Framer block to externally accept

data from the TxSer_n input pin, and to insert this data into the CRC-

6 bits within the outbound T1 data-stream.

This bit is ignored if CRC Multiframe Alignment is disabled

Framing Bits Source

Select

R/W

Framing Bits Source Select

This bit is used to specify the source for the Framing bits that will be

inserted into the outbound T1 frames. The Framing bits can be gen-

erated internally or inserted from the transmit serial input pin.

(TxSER_n input pin)

0 = Configures the Transmit T1 Framer block to internally generate

and insert the Framing bits into the outbound T1 data stream.

1 = Configures the Transmit T1 Framer block to externally accept

framing bits from the TxSer_n input pin, and to insert this data to the

outbound T1 data-stream.

TABLE 8: SYNCHRONIZATION MUX REGISTER (SMR)

HEX ADDRESS: 0Xn109

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

XRT86VL34 데이터시트(PDF) 27 Page - Exar Corporation