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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STPMIC25APQR 데이터시트(PDF) 72 Page - STMicroelectronics |
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STPMIC25APQR 데이터시트(HTML) 72 Page - STMicroelectronics |
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72 / 145 page  6.2.8 Enable status register 1 (EN_SR1) Table 36. EN_SR1 7 6 5 4 3 2 1 0 EN_REFDDR EN_BUCK7 EN_BUCK6 EN_BUCK5 EN_BUCK4 EN_BUCK3 EN_BUCK2 EN_BUCK1 R R R R R R R R • Address: 0x07 • Default: 0bxxxxxxxx where x depends on regulator status (0 = disabled, 1 = enabled) • Description: This register reflects the IP current enable status despite the setting in MAIN or ALT configurations. [7] EN_REFDDR: Current internal enable status of REFDDR. 0: Disabled 1: Enabled [6] EN_BUCK7: Current internal enable status of BUCK7. 0: Disabled 1: Enabled [5] EN_BUCK6: Current internal enable status of BUCK6. 0: Disabled 1: Enabled [4] EN_BUCK5: Current internal enable status of BUCK5. 0: Disabled 1: Enabled [3] EN_BUCK4: Current internal enable status of BUCK4. 0: Disabled 1: Enabled [2] EN_BUCK3: Current internal enable status of BUCK3. 0: Disabled 1: Enabled [1] EN_BUCK2: Current internal enable status of BUCK2. 0: Disabled 1: Enabled [0] EN_BUCK1: Current internal enable status of BUCK1. 0: Disabled 1: Enabled STPMIC25 Register descriptions DS14278 - Rev 3 page 72/145 |
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