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ADAU1761BCPZ-R7 데이터시트(PDF) 53 Page - Analog Devices

부품명 ADAU1761BCPZ-R7
상세설명  SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL
PDF  92 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADAU1761BCPZ-R7 데이터시트(HTML) 53 Page - Analog Devices

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Data Sheet
ADAU1761
CONTROL REGISTERS
analog.com
Rev. F | 53 of 92
Table 41. Record Power Management Register
Bits
Bit Name
Description
[6:5]
MXBIAS[1:0]
Mixer amplifier bias boost. Sets the boost level for the bias current of the record path mixers. In some cases, the boost level enhances the
THD + N performance.
Setting
Boost Level
00
Normal operation (default)
01
Boost Level 1
10
Boost Level 2
11
Boost Level 3
[4:3]
ADCBIAS[1:0]
ADC bias control. Sets the bias current for the ADCs based on the mode of operation selected.
Setting
ADC Bias Control
00
Normal operation (default)
01
Extreme power saving
10
Enhanced performance
11
Power saving
[2:1]
RBIAS[1:0]
Record path bias control. Sets the bias current for the PGAs and mixers in the record path.
Setting
Record Path Bias Control
00
Normal operation (default)
01
Reserved
10
Enhanced performance
11
Power saving
R4: Record Mixer Left (Mixer 1) Control 0, 16,394 (0x400A)
This register controls the gain of single-ended inputs for the left channel record path. The left channel record mixer is referred to as Mixer 1.
Table 42.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
LINPG[2:0]
LINNG[2:0]
MX1EN
Table 43. Record Mixer Left (Mixer 1) Control 0 Register
Bits
Bit Name
Description
[6:4]
LINPG[2:0]
Gain for a left channel single-ended input from the LINP pin, input to Mixer 1.
Setting
Gain
000
Mute (default)
001
−12 dB
010
−9 dB
011
−6 dB
100
−3 dB
101
0 dB
110
3 dB
111
6 dB
[3:1]
LINNG[2:0]
Gain for a left channel single-ended input from the LINN pin, input to Mixer 1.
Setting
Gain
000
Mute (default)
001
−12 dB
010
−9 dB
011
−6 dB
100
−3 dB
101
0 dB



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