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DSP56303 데이터시트(PDF) 210 Page - Freescale Semiconductor, Inc |
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DSP56303 데이터시트(HTML) 210 Page - Freescale Semiconductor, Inc |
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210 / 292 page ![]() DSP56303 User’s Manual, Rev. 2 9-18 Freescale Semiconductor Triple Timer Module Figure 9-17. Pulse Width Modulation Toggle Mode, TRM = 0 9.3.4 Watchdog Modes The following watchdog timer modes are provided: Watchdog Pulse Watchdog Toggle Mode 7 (internal clock): TRM = 0 N = write preload M = write compare TE Clock (CLK/2 or prescale CLK) TLR TCPR TCF (Compare Interrupt if TCIE = 1) Counter (TCR) first event M 0 N M 1 2 N Period = $FFFFFF - TLR + 1 Duty cycle = ($FFFFFF - TCPR) Ensure that TCPR > TLR for correct functionality 0 M + 1 TCF (Overflow Interrupt if TDIE = 1) TIO pin (INV = 0) TIO pin (INV = 1) Pulse width Period NOTE: On overflow, TCR is loaded with the value of TLR. |
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