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TMP93CS41 데이터시트(PDF) 80 Page - Toshiba Semiconductor |
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TMP93CS41 데이터시트(HTML) 80 Page - Toshiba Semiconductor |
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80 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-78 3.5.10 Port 9 (P90 to P97) • Ports 90 to 95 Ports 90 to 95 constitute a 6-bit general-purpose I/O ports. I/Os can be set on a bit basis. Resetting sets P90 to P95 to an input port and connects a pull-up resistor. It also sets all bits of the output latch register to 1. In addition to functioning as a general-purpose I/O port, P90 to P95 can also function as an I/O for serial channels 0 and 1. Writing “1” in the corresponding bit of the port 9 function register (P9FC) enables those functions. Resetting resets the function register P9CR, P9FC value to “0” and sets all bits to input ports. • Ports 96 to 97 Ports 96 to 97 form a 2-bit general-purpose I/O port. I/Os can be set on a bit basis. The output buffer for P96 to P97 is an open-drain type buffer. Resetting sets the output latch and control registers to “1” and outputs high-impedance (High-Z). In addition to functioning as a general-purpose I/O port, P96 to P97 can also function as a low-frequency oscillator connecting pin for dual clock mode. The dual clock function can be set by programming system clock control register SYSCR0 and 1. (1) Ports 90, 93 (TXD0/TXD1) Ports 90 and 93 also function as serial channel TXD output pins in addition to I/O ports. They have a programmable open-drain function. |
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