TMP93CS41 datasheet(27/248 Pages) TOSHIBA

27 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-25

3.3.4

Standby Controller

(1) HALT mode

When the HALT instruction is executed, the operating mode changes to RUN, IDLE2,

IDLE1 or STOP mode depending on the contents of the HALT mode setting register

WDMOD<HALTM1:0>. Figure 3.3.5 shows the alternative states of the watchdog

timer mode registers.

Watchdog Timer Mode Register

Bit symbol

WDTE

WDTP1

WDTP0

WARM

HALTM1

HALTM0

RESCR

DRVE

Read/Write

R/W

After reset

Function

Watchdog

timer control

0: Disable

1: Enable

Watchdog timer detect

time selection

00: 2

15/fSYS

01: 2

17/fSYS

10: 2

19/fSYS

11: 2

21/fSYS

Warm-up

timer

0: 2

14/clock

frequency

selection

1: 2

16/clock

frequency

selection

HALT mode selection

00: RUN mode

01: STOP mode

10: IDLE1 mode

11: IDLE2 mode

Runaway

detection

internal

reset control

1: Executes

internal

reset by

runaway

detection

STOP mode

pin control

1: Drive pins

in STOP

mode

Figure 3.3.5 Watchdog Timer Mode Register

The features of the RUN, IDLE2, IDLE1, and STOP modes are as follows.

1. RUN: Only the CPU HALTs.

2. IDLE2: The built-in oscillator and the specified I/O operates.

3. IDLE1: Only the built-in oscillator operates, while all other built-in circuits stop.

4. STOP: All internal circuits including the built-in oscillator stop. This greatly reduces

power consumption.

The operations in the halt state are described in Table 3.3.5.

Pin state control in STOP mode

WDMOD

(005CH)

I/O off

Retains the state before HALT

00 RUN mode (only CPU stops)

01 STOP mode (all circuits stop)

10 IDLE1 mode (only oscillator operating)

11 IDLE2 mode (partial I/O operation)

HALT mode setting

14/select clock frequency

16/select clock frequency

Warm-up time selection at returning from the

STOP mode (see table 3.3.7)

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