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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMP93CS44 데이터시트(PDF) 142 Page - Toshiba Semiconductor |
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TMP93CS44 데이터시트(HTML) 142 Page - Toshiba Semiconductor |
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142 / 224 page  TMP93CS44/S45 2004-02-10 93CS44-140 3.9.3 Operational description (1) Mode 0 (I/O interface mode) This mode is used to increase the number of I/O pins of for transmitting or receiving data to or from the external shifter register. This mode includes SCLK output mode to output synchronous clock SCLK0 and SCLK input mode to input external synchronous clock SCLK0. Figure 3.9.15 Example of SCLK Output Mode Connection Figure 3.9.16 Example of SCLK Input Mode Connection Output extension TC74HC595 or the like A B SI C D SCK E F RCK G H TXD SCLK Port Shift register TMP93CS44/S45 Input extension TC74HC165 or the like A B QH C D CLOCK E F S/ L G H RXD SCLK Port Shift register TMP93CS44/S45 Output port extension TC74HC595 or the like A B SI C D SCK E F RCK G H TXD SCLK Port Shift register TMP93CS44/S45 Input port extension TC74HC165 or the like A B QH C D CLOCK E F S/ L G H RXD SCLK Port Shift register TMP93CS44/S45 External clock External clock |
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