| 전자부품 데이터시트 검색엔진 |
|
TMP86FS28DFG 데이터시트(PDF) 168 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMP86FS28DFG 데이터시트(HTML) 168 Page - Toshiba Semiconductor |
|
168 / 272 page ![]() Page 156 11. Synchronous Serial Interface (SIO) 11.6 Transfer Mode TMP86FS28DFG Figure 11-6 Number of words to transfer (Example: 1word = 4bit) 11.6 Transfer Mode SIOCR1<SIOM> is used to select the transmit, receive, or transmit/receive mode. 11.6.1 4-bit and 8-bit transfer modes In these modes, firstly set the SIO control register to the transmit mode, and then write first transmit data (number of transfer words to be transferred) to the data buffer registers (DBR). After the data are written, the transmission is started by setting SIOCR1<SIOS> to “1”. The data are then output sequentially to the SO pin in synchronous with the serial clock, starting with the least significant bit (LSB). As soon as the LSB has been output, the data are transferred from the data buffer register to the shift register. When the final data bit has been transferred and the data buffer register is empty, an INTSIO (Buffer empty) interrupt is generated to request the next transmitted data. When the internal clock is used, the serial clock will stop and an automatic-wait will be initiated if the next transmitted data are not loaded to the data buffer register by the time the number of data words specified with the SIOCR2<BUF> has been transmitted. Writing even one word of data cancels the automatic-wait; therefore, when transmitting two or more words, always write the next word before transmission of the previous word is completed. Note:Automatic waits are also canceled by writing to a DBR not being used as a transmit data buffer register; there- fore, during SIO do not use such DBR for other applications. For example, when 3 words are transmitted, do not use the DBR of the remained 5 words. When an external clock is used, the data must be written to the data buffer register before shifting next data. Thus, the transfer speed is determined by the maximum delay time from the generation of the interrupt request to writing of the data to the data buffer register by the interrupt service program. The transmission is ended by clearing SIOCR1<SIOS> to “0” or setting SIOCR1<SIOINH> to “1” in buffer empty interrupt service program. a1 a2 a3 a0 a1 a2 a3 b0 b1 b2 b3 c0 c1 c2 c3 a0 a1 a0 a2 a3 b0 b1 b2 b3 c0 c1 c2 c3 (a) 1 word transmit (b) 3 words transmit (c) 3 words receive SO pin INTSIO interrupt INTSIO interrupt INTSIO interrupt SO pin SI pin SCK pin SCK pin SCK pin |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |