TMP86FS28DFG datasheet(201/272 Pages) TOSHIBA

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Page 189

TMP86FS28DFG

14.6 Precautions about AD Converter

14.6.1 Analog input pin voltage range

Make sure the analog input pins (AIN0 to AIN7) are used at voltages within VAREF to AVSS. If any voltage

outside this range is applied to one of the analog input pins, the converted value on that pin becomes uncertain.

The other analog input pins also are affected by that.

14.6.2 Analog input shared pins

The analog input pins (AIN0 to AIN7) are shared with input/output ports. When using any of the analog

inputs to execute AD conversion, do not execute input/output instructions for all other ports. This is necessary

to prevent the accuracy of AD conversion from degrading. Not only these analog input shared pins, some other

pins may also be affected by noise arising from input/output to and from adjacent pins.

14.6.3 Noise Countermeasure

The internal equivalent circuit of the analog input pins is shown in Figure 14-5. The higher the output

impedance of the analog input source, more easily they are susceptible to noise. Therefore, make sure the out-

put impedance of the signal source in your design is 5 k

Ω or less. Toshiba also recommends attaching a capac-

itor external to the chip.

Figure 14-5

Analog Input Equivalent Circuit and Example of Input Pin Processing

DA converter

AINi

Analog comparator

Internal resistance

Permissible signal

source impedance

Internal capacitance

5 k

Ω (typ)

C = 22 pF (typ.)

5 k

Ω (max)

Note) i = 7 to 0

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