FS32K142HAT0MLHT datasheet(24/84 Pages) NXP

24 / 84 page

be 100 ns. After this filtering mechanism, the software has an option to put additional filtering in addition to this, by means

of PCM_RPC register and/or PORT_DFER register for PTA5.

5.3 DC electrical specifications at 3.3 V Range

NOTE

For details on the pad types defined in Table 11 and Table 12,

see Reference Manual section IO Signal Table and IO Signal

Description Input Multiplexing sheet(s) attached with

Reference Manual.

Table 11. DC electrical specifications at 3.3 V Range

Symbol

Parameter

Value

Unit

Notes

Min.

Typ.

Max.

VDD

I/O Supply Voltage

2.7

3.3

Vih

Input Buffer High Voltage

0.7 × VDD

—

VDD + 0.3

Vil

Input Buffer Low Voltage

VSS − 0.3

—

0.3 × VDD

Vhys

Input Buffer Hysteresis

0.06 × VDD

—

IohGPIO

IohGPIO-HD_DSE_0

I/O current source capability measured when

pad Voh = (VDD − 0.8 V)

3.5

—

IolGPIO

IolGPIO-HD_DSE_0

I/O current sink capability measured when

pad Vol = 0.8 V

—

IohGPIO-HD_DSE_1

I/O current source capability measured when

pad Voh = (VDD − 0.8 V)

—

IolGPIO-HD_DSE_1

I/O current sink capability measured when

pad Vol = 0.8 V

—

IohGPIO-FAST_DSE_0 I/O current sink capability measured when

pad Voh=VDD-0.8 V

9.5

—

IolGPIO-FAST_DSE_0 I/O current sink capability measured when

pad Vol = 0.8 V

—

IohGPIO-FAST_DSE_1 I/O current sink capability measured when

pad Voh=VDD-0.8 V

—

IolGPIO-FAST_DSE_1 I/O current sink capability measured when

pad Vol = 0.8 V

15.5

—

IOHT

Output high current total for all ports

—

100

IIN

Input leakage current (per pin) for full temperature range at VDD = 3.3 V

All pins other than high drive port pins

0.005

0.5

μA

High drive port pins 7

0.010

0.5

μA

RPU

Internal pullup resistors

kΩ

RPD

Internal pulldown resistors

kΩ

1. S32K148 will operate from 2.7 V when executing from internal FIRC. When the PLL is engaged S32K148 is guaranteed to

operate from 2.97 V. All other S32K family devices operate from 2.7 V in all modes.

2. For reset pads, same Vih levels are applicable

3. For reset pads, same Vil levels are applicable

I/O parameters

S32K1xx Data Sheet, Rev. 9, 09/2018

NXP Semiconductors

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