FS32K118LAT0MLHT datasheet(27/84 Pages) NXP

27 / 84 page

Table 14. AC electrical specifications at 5 V Range (continued)

Symbol

DSE

Rise time (nS)1

Fall time (nS) 1

Capacitance (pF) 2

Min.

Max .

Min.

Max.

5.0

15.7

5.1

17.4

17.3

54.8

17.6

59.7

200

1.1

4.6

1.1

5.0

2.0

5.7

2.0

5.8

5.4

16.0

5.0

16.0

200

tRFGPIO-FAST

0.42

2.2

0.37

2.2

2.0

5.0

1.9

5.2

9.3

18.8

8.5

19.3

200

0.37

0.9

0.35

0.9

1.2

2.7

1.2

2.9

6.0

11.8

6.0

12.3

200

1. For reference only. Run simulations with the IBIS model and your custom board for accurate results.

2. Maximum capacitances supported on Standard IOs. However interface or protocol specific specifications might be

different, for example for ENET, QSPI etc. . For protocol specific AC specifications, see respective sections.

5.7 Standard input pin capacitance

Table 15. Standard input pin capacitance

Symbol

Description

Min.

Max.

Unit

CIN_D

Input capacitance: digital pins

—

NOTE

Please refer to External System Oscillator electrical

specifications for EXTAL/XTAL pins.

5.8 Device clock specifications

Table 16. Device clock specifications 1

Symbol

Description

Min.

Max.

Unit

High Speed run mode2

fSYS

System and core clock

—

112

MHz

fBUS

Bus clock

—

MHz

fFLASH

Flash clock

—

MHz

Normal run mode (S32K11x series)

fSYS

System and core clock

—

MHz

Table continues on the next page...

I/O parameters

S32K1xx Data Sheet, Rev. 9, 09/2018

NXP Semiconductors

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