FS32K118LAT0MLHT datasheet(48/84 Pages) NXP

48 / 84 page

Table 31. Comparator with 8-bit DAC electrical specifications (continued)

Symbol

Description

Min.

Typ.

Max.

Unit

Analog comparator hysteresis, Hyst2, Low-speed

mode

-40 - 125

℃

—

VHYST3

Analog comparator hysteresis, Hyst3, High-speed

mode

-40 - 125

℃

—

200

Analog comparator hysteresis, Hyst3, Low-speed

mode

-40 - 125

℃

—

120

IDAC8b

8-bit DAC current adder (enabled)

3.3V Reference Voltage

—

μA

5V Reference Voltage

—

μA

INL5

8-bit DAC integral non-linearity

–0.75

—

0.75

LSB6

DNL

8-bit DAC differential non-linearity

–0.5

—

0.5

LSB6

tDDAC

Initialization and switching settling time

—

μs

1. Difference at input > 200mV

2. Applied ± (100 mV + VHYST0/1/2/3+ max. of VAIO) around switch point.

3. Applied ± (30 mV + 2 × VHYST0/1/2/3+ max. of VAIO) around switch point.

4. Applied ± (100 mV + VHYST0/1/2/3).

5. Calculation method used: Linear Regression Least Square Method

6. 1 LSB = Vreference/256

NOTE

For comparator IN signals adjacent to VDD/VSS or XTAL/

EXTAL or switching pins cross coupling may happen and

hence hysteresis settings can be used to obtain the desired

comparator performance. Additionally, an external capacitor

(1nF) should be used to filter noise on input signal. Also, source

drive should not be weak (Signal with < 50 K pull up/down is

recommended).

ADC electrical specifications

S32K1xx Data Sheet, Rev. 9, 09/2018

NXP Semiconductors

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