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FS32K118LAT0MLHT 데이터시트(PDF) 43 Page - NXP Semiconductors |
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FS32K118LAT0MLHT 데이터시트(HTML) 43 Page - NXP Semiconductors |
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43 / 84 page ![]() SCK tOV Output Invalid Data tIV Figure 12. QuadSPI output timing (HyperRAM mode) diagram Analog modules ADC electrical specifications 6.4.1.1 12-bit ADC operating conditions Table 27. 12-bit ADC operating conditions Symbol Description Conditions Min. Typ.1 Max. Unit Notes VREFH ADC reference voltage high See Voltage and current operating requirements for values VDDA See Voltage and current operating requirements for values V 2 VREFL ADC reference voltage low See Voltage and current operating requirements for values 0 See Voltage and current operating requirements for values mV 2 VADIN Input voltage VREFL — VREFH V RS Source impedendance fADCK < 4 MHz — — 5 kΩ RSW1 Channel Selection Switch Impedance — 0.75 1.2 kΩ RAD Sampling Switch Impedance — 2 5 kΩ CP1 Pin Capacitance — 10 — pF CP2 Analog Bus Capacitance — — 4 pF CS Sampling capacitance — 4 5 pF Table continues on the next page... 6.4 6.4.1 Analog modules S32K1xx Data Sheet, Rev. 9, 09/2018 NXP Semiconductors 43 |
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