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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LAN9252/ML 데이터시트(PDF) 169 Page - Microchip Technology |
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LAN9252/ML 데이터시트(HTML) 169 Page - Microchip Technology |
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169 / 329 page  2015 Microchip Technology Inc. DS00001909A-page 169 LAN9252 11.2.16.19 PHY x Cable Length Register (PHY_CABLE_LEN_x) Index (In Decimal): 28 Size: 16 bits Bits Description Type Default 15:12 Cable Length (CBLN) This four bit value indicates the cable length. Refer to Section 11.2.12.2, "Matched Cable Diagnostics," on page 139 for additional information on the usage of this field. Note: This field indicates cable length for 100BASE-TX linked devices that do not have an open/short on the cable. To determine the open/short status of the cable, the PHY x TDR Patterns/Delay Control Register (PHY_TDR_PAT_DELAY_x) and PHY x TDR Control/Status Register (PHY_TDR_CONTROL_STAT_x) must be used. Cable length is not supported for 10BASE-T links. Refer to Section 11.2.12, "Cable Diagnostics," on page 136 for additional information. RO 0000b 11:0 RESERVED - Write as 100000000000b, ignore on read R/W - |
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