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SLAS366 데이터시트(PDF) 15 Page - Texas Instruments

부품명 SLAS366
상세설명  Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port
PDF  58 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

SLAS366 데이터시트(HTML) 15 Page - Texas Instruments

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3–3
Writing 10 into bits D2–D1 chooses pseudo-differential MICIN mode. In this mode the single ended input is connected
through ac-coupling to MICIN and the bias voltage used to generate the signal is also ac coupled to INM1 as shown
in Figure 5–20. For best noise performance the MICIN and INM1 lines must be routed in similar fashion from the
microphone to the device for noise cancellation.
For high quality performance the single ended signal is converted internally into differential signal before being
converted. To improve the dynamic range with different types of microphones the device supports a pre-amp with
gain settings of 0/6/12/24 dB. This can be chosen by writing into bits D1–D0 of control register 5C.
TLV320AIC14
TLV320AIC14
BIAS
MICIN
10 k
0.1
µF
Electret
Microphone
BIAS
MICIN
INM1
0.1
µF
10 k
0.1
µF
Electret
Microphone
(a) Single Ended
(b) Pseudo -Differential (High Quality)
Figure 3–1. Microphone Interface
3.3.2
INP and INM Input
To produce common-mode rejection of unwanted signal performance, the analog signal is processed differentially
until it is converted to digital data. The signal applied to the terminals INM1/2 and INP1/2 are differential to preserve
device specifications (see Figure 3–2). The signal source driving analog inputs (INP1/2 and INM1/2) should have low
source impedance for lowest noise performance and accuracy. To obtain maximum dynamic range, the signal should
be ac-coupled to the input terminal.
INP1 or INP2
INM1 or INM2
1.35 V
TLV320AIC14
V(INP)
V(INM)
Figure 3–2. INP and INM Internal Self-Biased Circuit
3.3.3
Single-Ended Analog Input
The two differential inputs of (INP1/M1 and INP2/M2) can be configured to work as single-ended inputs by connecting
INP to the analog input and INM to ground (see Figure 3–3).
INP1 or INP2
INM1 or INM2
C
C
Analog Input
Figure 3–3. Single-Ended Input



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