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LM96063CISDX/NOPB 데이터시트(PDF) 16 Page - Texas Instruments |
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LM96063CISDX/NOPB 데이터시트(HTML) 16 Page - Texas Instruments |
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16 / 46 page ![]() n n+1 n+2 n+3 n+4 n+5 SAMPLE NUMBER RDTS Measurement Status Register: RTDS High 25 27 29 31 33 35 37 39 41 43 45 0 50 100 150 200 SAMPLE NUMBER LM96063 with Filter On LM96063 with Filter Off LM96063 SNIS149B – NOVEMBER 2011 – REVISED MARCH 2013 www.ti.com Figure 10. Filter Curves were Purposely Offset for Clarity Figure 10 shows the filter in use in a typical Intel processor on a 65/90 nm process system. Note that the two curves have been purposely offset for clarity. Inserting the filter does not induce an offset as shown. FAULT QUEUE The LM96063 incorporates a Fault Queue to suppress erroneous ALERT triggering. The Fault Queue prevents false triggering by requiring three consecutive out-of-limit HIGH or LOW temperature readings. See Figure 11. The Fault Queue defaults to OFF upon power-up and may be activated by setting the RDTS Fault Queue bit in the Configuration Register to a 1. Figure 11. Fault Queue Temperature Response Diagram ONE-SHOT REGISTER The One-Shot Register is used to initiate a single conversion and comparison cycle when the device is in standby mode, after which the data returns to standby. This is not a data register. A write operation causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will always be read from this register. SERIAL INTERFACE RESET In the event that the SMBus Master is reset while the LM96063 is transmitting on the SMBDAT line, the LM96063 must be returned to a known state in the communication protocol. This may be done in one of two ways: 1. When SMBDAT is Low, the LM96063 SMBus state machine resets to the SMBus idle state if either SMBDAT or SMBCLK are held Low for more than 35 ms (tTIMEOUT). Devices are to timeout when either the SMBCLK or 16 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LM96063 |
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