1

2 S (C + 6 pF) fS

R =

ADC08B200

SNAS388F – MARCH 2007 – REVISED APRIL 2013

www.ti.com

where

•

fS is the converter sample rate

(4)

The added 6 pF in the formula above allows for the ADC input capacitance and a small board capacitance. For

undersampling applications, eliminate the capacitor and chose a pole frequency of about 2 to 3 times the

maximum input frequency, using the ADC input capacitance when the clock is high, plus trace capacitance, for

the filter capacitor. The optimum time constant for this circuit depends not only upon the amplifier and ADC, but

also upon the circuit layout and board material. The LMH6702 and the LMH6628 have been found to be good

amplifiers to drive the ADC08B200.

Figure 46 shows an example of an input circuit using the LMH6702 at the ADC08B200 input. The input amplifier

should incorporate some gain as most operational amplifiers exhibit better phase margin and transient response

with gains above 2 or 3 than with unity gain. If an overall gain of less than 3 is required, attenuate the input and

operate the amplifier at a higher gain, as indicated in Figure 46.

This will provide optimum SNR performance for Nyquist applications. Best THD performance is realized when the

capacitor and resistor values are both zero, but this would compromise SNR and SINAD performance. Generally,

the capacitor should not be added for undersampling applications.

The circuit of Figure 46 has both gain and offset adjustments. If you eliminate these adjustments normal circuit

tolerances may result in signal clipping unless care is exercised in the worst case analysis of component

tolerances and the input signal excursion is appropriately limited to account for the worst case conditions.

Full scale and offset adjustments may also be made by adjusting VRT and VRB, perhaps with the aid of a pair of a

DACs or a dual DAC. Of course, this circuit may be implemented without provision for offset and gain

adjustments, but component tolerances would require the planned use of less than the full dynamic range of the

ADC.

One advantage of having access to the bottom of the reference ladder (VRB) is that the voltage at the analog

input does not have to come to 0V to cause an output code of zero. If VRB is set high enough, the negative

supply on the amplifier driving the analog input may be at ground. How high VRB needs to be set to allow this will

depend upon the amplifier type and how close to its negative supply (or ground) the output can go while

maintaining linearity. This might be 100mV to 150mV for a rail-to-rail output amplifier or 1 Volt for other

amplifiers.

24

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