MB85RC256TY(AEC-Q100 Compliant)

DS501-00077-1v1-E

3



BLOCK DIAGRAM



I2C (Inter-Integrated Circuit)

The MB85RC256TY has the two-wire serial interface; the I2C bus, and operates as a slave device.

The I2C bus defines communication roles of “master” and “slave” devices, with the master side holding the

authority to initiate control. Furthermore, the I2C bus connection is possible where a single master device is

connected to multiple slave devices in a party-line configuration. In this case, it is necessary to assign a

unique device address to the slave device, the master side starts communication after specifying the slave

to communicate by addresses.



I2C Interface System Configuration Example

WP

A0, A1, A2

SDA

SCL

FeRAM Array

32,768  8

Serial/Parallel Converter

Column Decoder/Sense Amp/

Write Amp

SCL

SDA

A2

A1

A0

000

A2

A1

A0

001

A2

A1

A0

010

...

VDD

I2C Bus

Master

I2C Bus

MB85RC256T

Y

I2C Bus

MB85RC256T

Y

I2C Bus

MB85RC256T

Y

Pull-up

Resistors

Device address