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L9679E 데이터시트(PDF) 84 Page - STMicroelectronics |
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L9679E 데이터시트(HTML) 84 Page - STMicroelectronics |
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84 / 127 page ![]() Figure 23. Remote sensor synchronization pulses GADG0903181545PS SATFD4 SATFD3 SATFD2 SATFD1 SATSYNC To guarantee sync pulse shaping and minimum sync pulse amplitude (Vt2) there are constraints on the minimum delta voltage between VSYNC and VSAT supplies. For VSYNC supply large enough (VSYNC ≥ VRSUbase + 4.8 V), the interface regulate the sync pulse (regulation mode) and Vt2 amplitude is guaranteed. For VSYNC supply lower, the sync pulse amplitude is limited by the drop across the FET RDSon so designer shall consider a lower amplitude for it. In case L9679E IC is supplied directly by the SB1 system chip, the worst case in terms of delta between VSYNC and VSAT can be considered equal to 4.2 V. In this case the min Vt2 that the IC is able to guarantee is indicated by parameter Vt2_low. L9679E Remote sensor interface DS12485 - Rev 8 page 84/127 |
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