IS25LE01G-RILA3 datasheet(95/186 Pages) ISSI

부품명	IS25LE01G-RILA3

상세설명	SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	186 Pages

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제조업체	ISSI [Integrated Silicon Solution, Inc]

홈페이지	http://www.issi.com

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95 / 186 page

IS25LE01G

IS25WE01G

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A6

01/14/2025

8.16 WRITE ENABLE OPERATION (WREN, 06h)

The Write Enable (WREN) instruction is used to set the Write Enable Latch (WEL) bit. The WEL bit is reset to the

write-protected state after power-up. The WEL bit must be write enabled before any write operation, including

Sector Erase, Block Erase, Chip Erase, Page Program, Program Information Row, Write Status Register, Write

Function Register, Set Non-Volatile Read Register, Set Non-Volatile Extended Read Register operations, Set

Volatile Read Register and Set Volatile Extended Read Register. The WEL bit will be reset to the write-protected

state automatically upon completion of a write operation. The WREN instruction is required before any above

operation is executed.

Figure 8.41 Write Enable Sequence In SPI Mode

Instruction = 06h

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.42 Write Enable Sequence In QPI Mode

06h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

IS25LE01G-RILA3 데이터시트(PDF) 95 Page - Integrated Silicon Solution, Inc