IS25LE01G-RILA3 datasheet(12/186 Pages) ISSI

부품명	IS25LE01G-RILA3

상세설명	SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	186 Pages

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제조업체	ISSI [Integrated Silicon Solution, Inc]

홈페이지	http://www.issi.com

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12 / 186 page

IS25LE01G

IS25WE01G

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A6

01/14/2025

4. SPI MODES DESCRIPTION

Multiple IS25LE01G devices or multiple IS25WE01G devices can be connected on the SPI serial bus and controlled

by a SPI Master, i.e. microcontroller, as shown in Figure 4.1. The devices support either of two SPI modes:

Mode 0 (0, 0)

Mode 3 (1, 1)

The difference between these two modes is the clock polarity. When the SPI master is in stand-by mode, the serial

clock remains at “0” (SCK = 0) for Mode 0 and the clock remains at “1” (SCK = 1) for Mode 3. Please refer to Figure

4.2 and Figure 4.3 for SPI and QPI mode. In both modes, the input data is latched on the rising edge of Serial Clock

(SCK), and the output data is available from the falling edge of SCK.

Figure 4.1 Connection Diagram among SPI Master and SPI Slaves (Memory Devices)

SPI interface with

(0,0) or (1,1)

SPI Master

(i.e. Microcontroller)

SPI

Memory

Device

SPI

Memory

Device

SPI

Memory

Device

SCK SO

SCK

SDI

SDO

CE#

WP#

SCK SO

CE#

WP#

SCK SO

CE#

WP# HOLD#

or RESET#

CS3

CS2

CS1

HOLD#

or RESET#

HOLD#

or RESET#

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