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STM32H533CE 데이터시트(PDF) 51 Page - STMicroelectronics |
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STM32H533CE 데이터시트(HTML) 51 Page - STMicroelectronics |
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51 / 231 page ![]() DS14539 Rev 1 51/231 STM32H533xx Functional overview 60 3.36 Improved inter-integrated circuit (I3C) The I3C interface handles communication between the MCU and others, like sensors and host processor(s), all connected on an I3C bus. The peripheral implements the required features of the MIPI I3C specification v1.1. It can control I3C bus-specific sequencing, protocol, arbitration and timing, and can act as controller (formerly known as master) or as target (formerly known as slave). When acting as controller the peripheral improves the features of the I2C interface, preserving some backward compatibility: it allows an I2C target to operate on an I3C bus in legacy I2C fast-mode (Fm) or legacy I2C fast-mode plus (Fm+), provided that the latter does not perform clock stretching. The I3C peripheral can be used with DMA to off-load the CPU. Table 8. I2C implementation I2C features(1) 1. X: supported I2C1 I2C2 I2C3 Standard-mode (up to 100 Kbit/s) X X X Fast-mode (up to 400 Kbit/s) X X X Fast-mode Plus with 20 mA output drive I/Os (up to 1 Mbit/s) X X X Programmable analog and digital noise filters X X X SMBus/PMBus hardware support X X X Independent clock X X X Wakeup capability X X X |
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