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AD4884BBCZ 데이터시트(PDF) 89 Page - Analog Devices

부품명 AD4884BBCZ
상세설명  Dual-Channel 16-Bit, 20MSPS, SAR ADC with Analog Front End
PDF  116 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD4884BBCZ 데이터시트(HTML) 89 Page - Analog Devices

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Data Sheet
AD4884
DIGITAL FEATURES
analog.com
Rev. 0 | 89 of 116
Digital Filter Conversion Pulses
The total number of CNVChX pulses required for a single filter
decimated result (sinc1 settling clocks) can be calculated using the
following formula:
SettlingCNVPulsesSINC1=2+ D+1
Note that each of the three filter types has a unique formula to
determine the number of clocks required.
For the sinc5 settling clocks, the equation is as follows:
SettlingCNVPulsesSINC5=2+ 5×D+4
For the sinc5 with compensation settling clocks, the equation is as
follows:
SettlingCNVPulsesSINC5+COMP=
2+ 35×D+10
Where D equals the decimation rate 2, 4, 8 …
Digital Filtering Settling Time
The settling time for the selected filter is the number of settling
clocks times tCONV, as follows:
Filter Settling Time=
(SettlingCNVPulsesFILTERTYPE ×tCONV
Digital Filtering Settling Time when Using FIFO
When using the FIFO with filtered data, it is important to note
that each new FIFO record of results must begin by issuing a
FILTER_SYNC signal on the first CNVChX to reset and initialize the
filter and to prevent unflushed data from being contained in the first
FIFO record result.
The minimum total number of conversion pulses required to fill a full
FIFO record can be calculated as follows:
TotalRequiredCNVs = D×WATERMARK +
 Settling CNV PulsesFILTERTYPE
Where D equals the decimation rate 2, 4, 8 …
Digital Filter Response
Sinc1 Filter
Figure 136. Sinc1 Filter Response, Decimate by 2
Figure 137. Sinc1 Filter Response, Decimate by 4
Figure 138. Sinc1 Filter Response, Decimate by 8



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