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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TAS5706PAPR 데이터시트(PDF) 12 Page - Texas Instruments |
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TAS5706PAPR 데이터시트(HTML) 12 Page - Texas Instruments |
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12 / 62 page  www.ti.com SERIAL AUDIO PORTS SLAVE MODE TAS5706 SLOS550A – DECEMBER 2007 – REVISED DECEMBER 2007 over recommended operating conditions (unless otherwise noted) TEST PARAMETER MIN TYP MAX UNIT CONDITIONS fSCLKIN Frequency, SCLK 32 × f S, 48 × fS, 64 × fS CL = 30 pF 1.024 12.288 MHz tsu1 Setup time, LRCLK to SCLK rising edge 10 ns th1 Hold time, LRCLK from SCLK rising edge 10 ns tsu2 Setup time, SDIN to SCLK rising edge 10 ns th2 Hold time, SDIN from SCLK rising edge 10 ns LRCLK frequency 32 48 192 kHz SCLK duty cycle 40% 50% 60% LRCLK duty cycle 40% 50% 60% SCLK SCLK rising edges between LRCLK rising edges 32 64 edges t(edge) SCLK LRCLK clock edge with respect to the falling edge of SCLK –1/4 1/4 period Figure 1. Slave Mode Serial Data Interface Timing 12 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TAS5706 |
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