전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

SMC032AF 데이터시트(PDF) 48 Page - Numonyx B.V

부품명 SMC032AF
상세설명  32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte and 512 Mbyte 3.3 V / 5 V supply CompactFlash??card
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

SMC032AF 데이터시트(HTML) 48 Page - Numonyx B.V

Back Button SMC032AF Datasheet HTML 44Page - Numonyx B.V SMC032AF Datasheet HTML 45Page - Numonyx B.V SMC032AF Datasheet HTML 46Page - Numonyx B.V SMC032AF Datasheet HTML 47Page - Numonyx B.V SMC032AF Datasheet HTML 48Page - Numonyx B.V SMC032AF Datasheet HTML 49Page - Numonyx B.V SMC032AF Datasheet HTML 50Page - Numonyx B.V SMC032AF Datasheet HTML 51Page - Numonyx B.V SMC032AF Datasheet HTML 52Page - Numonyx B.V Next Button
Zoom Inzoom in Zoom Outzoom out
 48 / 82 page
background image
CF-ATA registers
SMCxxxAF
48/82
8.9
Status & alternate status registers (address 1F7h [177h] &
3F6h [376h]; offsets 7 & Eh)
These registers return the card status when read by the host.
Reading the status register clears a pending interrupt. Reading the auxiliary status register
does not clear a pending interrupt.
The status register should be accessed in Byte mode; in Word mode it is recommended that
alternate status register is used. The status bits are described as follows
8.9.1
Bit 7 (BUSY)
The busy bit is set when only the card can access the command register and buffer. The
host is denied access. No other bits in this register are valid when this bit is set to ‘1’.
8.9.2
Bit 6 (RDY)
This bit indicates whether the device is capable of performing CompactFlash memory card
operations. This bit is cleared at power-up and remains cleared until the card is ready to
accept a command.
8.9.3
Bit 5 (DWF)
When set this bit indicates a write fault has occurred.
8.9.4
Bit 4 (DSC)
This bit is set when the card is ready.
8.9.5
Bit 3 (DRQ)
The data request is set when the card requires information be transferred either to or from
the host through the data register. The bit is cleared by the next command.
8.9.6
Bit 2 (CORR)
This bit is set when a correctable data error has been encountered and the data has been
corrected. This condition does not terminate a multi-sector read operation.
8.9.7
Bit 1 (IDX)
This bit is always set to ‘0’.
8.9.8
Bit 0 (ERR)
This bit is set when the previous command has ended in some type of error. The bits in the
error register contain additional information describing the error. In case of read or write
access commands that end with an error, the address of the first sector with an error is in
the command block registers. This bit is cleared by the next command.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com