MAXQ3180-RAN+ datasheet(33/48 Pages) MAXIM

33 / 48 page

Low-Power, Multifunction, Polyphase AFE

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Table 5. Virtual Registers (continued)

NAME

ADDRESS

DESCRIPTION

DATA LENGTH

(BYTES)

PWRS.C

0x824

Phase C Apparent Power. Units defined by PWR_FS setting.

PWRS.T

0x827

Total A + B + C Apparent Power. Units defined by PWR_FS setting.

V.A

0x831

Phase A RMS-Voltage. Units defined by VOLT_FS setting.

V.B

0x832

Phase B RMS-Voltage. Units defined by VOLT_FS setting.

V.C

0x834

Phase C RMS-Voltage. Units defined by VOLT_FS setting.

I.A

0x841

Phase A RMS-Current. Units defined by AMP_FS setting.

I.B

0x842

Phase B RMS-Current. Units defined by AMP_FS setting.

I.C

0x844

Phase C RMS-Current. Units defined by AMP_FS setting.

LINEFREQ

0x851

Line Frequency; LSB = 0.001Hz.

VBPH

0x852

Voltage B Phase Delay to Voltage A; LSB = 0.01

°.

VCPH

0x854

Voltage C Phase Delay to Voltage A; LSB = 0.01

°.

PF.A

0x861

Phase A Power Factor; Two’s Complement, LSB = 0.00001.

PF.B

0x862

Phase B Power Factor; Two’s Complement, LSB = 0.00001.

PF.C

0x864

Phase C Power Factor; Two’s Complement, LSB = 0.00001.

PF.T

0x867

Total A + B + C Power Factor; Two’s Complement, LSB = 0.00001.

Table 6. Virtual Register with Special Commands

NAME

ADDRESS

DESCRIPTION

DATA LENGTH

(BYTES)

UPD_SFR

0x900

Copy mirror registers (R_ADCF, R_ADCRATE, R_ADCACQ, R_SPICF) into

hardware SFR registers. Read dummy data.

UPD_MIR

0xA00

Copy hardware SFR registers into mirror registers (R_ADCF, R_ADCRATE,

R_ADCACQ, R_SPICF). Read dummy data.

Special Commands

Some virtual registers trigger special commands when

read by the master (Table 6). Writing these registers has

no effect. All reads from these registers return dummy

data.

Analog Front-End Processing

Whenever the MAXQ3180 is in one of the active operat-

ing modes (Run Mode or LPMM Mode), the analog

front-end operates continuously, scanning through up to

eight scan slots depending on the selected front-end

configuration. For each analog scan slot that is enabled,

one of the eight differential input pairs is measured.

The SCAN_0 to SCAN_7 registers contain the settings

for each slot, which include whether the slot is enabled,

the differential input pair to measure during that scan

slot, and the logical mapping of that slot. One typical

configuration might be:

• Slot 0—Phase A Current (IA)

• Slot 1—Phase A Voltage (VA)

• Slot 2—Phase C Current (IC)

• Slot 3—Phase C Voltage (VC)

• Slot 4—Phase B Current (IB)

• Slot 5—Phase B Voltage (VB)

• Slot 6—Neutral Current (IN)—disabled by default

• Slot 7—Temperature Measurement—normally dis-

abled, activated when TMPC0 or TMPC1 is set

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