MK50H27PLCC datasheet(25/56 Pages) STMICROELECTRONICS

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4.2.1 Mode Register

The Mode Register allows alteration of the MK50H27’s operating parameters.

BIT

NAME

DESCRIPTION

15:11

MFS<4:0>

Minimum Frame Spacing defines the minimum number of flag

sequences transmitted

between adjacent frames transmitted by the

MK50H27. This only affects frames transmitted by the MK50H27

and does not restrict the spacing of the frames received by the

MK50H27.

When

using RTS/CTS control this field defines the

number of flags transmitted at the beginning of the frame after

CTS is driven low (minus one for the trailing flag).

See

the fol-

lowing table for encoding of this field.

EXTCF

Extended Control Force. Must be reset to zero for both SS7 and HDLC

transparent mode

EXTAF

Extended Address Force. If set along with EXTA, the receiver will

assume the address to be two otets long regardless of the first bit of

the address. See EXTA below. Must be set to a 1 for SS7 operation.

Must be reset to a zero for HDLC transparent mode.

DACE

Disable Address and Control field Extraction. DACE should be written

with ”0” for normal SS7 operation and with ”1” for HDLC Transparent

mode. The MK50H27 however, has a feature to allow shifting of the

alignment of the data in the MSU buffers. If DACE is set to ”1” for SS7

mode, the received LI will be placed in the first byte of the receive buff-

er, followed by the SIO in the second byte and so on. If DACE = 1, on

transmit the LI must be placed in the first byte of the transmit buffer

rather than in the SUL field of the Transmit Descriptor Entry (TMD2).

EXTC

Extended Control Field. Must be reset to zero for both SS7 and HDLC

transparent mode.

EXTA

Extended address Field. Must be set to a 1 for SS7 operation. Must

be reset to a zero for HDLC transparent mode.

LBACK

<2:0>

MFS

<4:0>

IADR + 00

NUMBER OF FLAGS

MFS<4:0>

NUMBER OF FLAGS

MFS<4:0>

MK50H27

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