ST52F510 datasheet(29/106 Pages) STMICROELECTRONICS

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ST52F510/F513/F514

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Table 3.4 Configuration Registers

Mnemonic

Description

Address

INT_MASK

Interrupt Mask Register

00h

INT_POL

Interrupts Polarity

01h

INT_PRL_H

Interrupt Priority Register (higher priority)

02h

INT_PRL_M

Interrupt Priority Register (medium priority)

03h

INT_PRL_L

Interrupt Priority Register (lower priority)

04h

USTP_H

User Stack Top Pointer (MSB)

05h

USTP_L

User Stack Top Pointer (LSB)

06h

WDT_CR

Watchdog Configuration Register

07h

AD_CR1

10-bit A/D Converter Control Register 1

08h

PWM0_CR1

PWM/Timer 0 Configuration Register 1

09h

PWM0_CR2

PWM/Timer 0 Configuration Register 2

0Ah

PWM0_CR3

PWM/Timer 0 Configuration Register 3

0Bh

PWM1_CR1

PWM/Timer 1 Configuration Register 1

0Ch

PWM1_CR2

PWM/Timer 1 Configuration Register 2

0Dh

Not Used

0Eh

Not Used

0Fh

I2C_CR

I2C Interface Control Register

010h

I2C_CCR

I2C Interface Clock Control Register

011h

I2C_OAR1

I2C Interface Own Address Register 1

012h

I2C_OAR2

I2C Interface Own Address Register 2

013h

SPI_CR

Serial Peripheral Interface Control Register

014h

SPI_STATUS_CR

Serial Peripheral Interface Control-Status Register

015h

SCI_CR1

Serial Communication Interface Control Register 1

016h

SCI_CR2

Serial Communication Interface Control Register 2

017h

PORT_A_PULLUP

Port A Pull Up enable/disable Register

018h

PORT_A_OR

Port A Option Register

019h

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