 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
STLC1502 데이터시트(PDF) 2 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STLC1502 데이터시트(HTML) 2 Page - STMicroelectronics |
|
|
2 / 81 page  STLC1502 2/81 • Data Modem: V.34 datapump • Rate selection • High performance voice activity detector (VAD) • Comfort noise generator (CNG) • G.165 32 ms Line & acoustic echo canceller • Low latency system implementation Figure 1: Block diagram 3.0 SYSTEM OVERVIEW Three main blocks can be identified in the device architecture: ARM domain, the D950 domain and the Clocks tree domain. 3.1 ARM7 domain The ARM domain is a multibus microprocessor system based on the ARM7TDMI processor. • The system bus is based on the Advanced Microcontroller Bus Architecture (AMBA) that includes two distinct buses: • The Advanced High performance Bus (AHB) for high performances system modules • The Advanced Peripheral Bus (APB) for low power peripherals. • A high speed 32 bit data bus is provided to connect external memories. • A controller for external static memory (ESM) and a controller for external dynamic memory (EDM) are provided. • Static memories, like FLASH EPROM, SRAM and dynamic memories like EDO, SDRAM, can be |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
