MSC7119 datasheet(29/60 Pages) FREESCALE

부품명	MSC7119

상세설명	Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC

PDF	60 Pages

Scroll/Zoom	100%

제조업체	FREESCALE [Freescale Semiconductor, Inc]

홈페이지	http://www.freescale.com

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29 / 60 page

Electrical Characteristics

MSC7119 Data Sheet, Rev. 8

Freescale Semiconductor

2.5.6

Ethernet Timing

2.5.6.1

Receive Signal Timing

Figure 9. TDM Transmit Signals

Table 21. Receive Signal Timing

No.

Characteristics

Min

Max

Unit

800

Receive clock period:

• MII: RXCLK (max frequency = 25 MHz)

• RMII: REFCLK (max frequency = 50 MHz)

—

801

Receive clock pulse width high—as a percent of clock period

• MII: RXCLK

• RMII: REFCLK

—

802

Receive clock pulse width low—as a percent of clock period:

• MII: RXCLK

• RMII: REFCLK

—

803

RXDn, RX_DV, CRS_DV, RX_ER to receive clock rising edge setup time

—

804

Receive clock rising edge to RXDn, RX_DV, CRS_DV, RX_ER hold time

—

Figure 10. Ethernet Receive Signal Timing

TDMxTCK

TDMxTD

306

307

309

308

300

301

302

311

310

TDMxRCK

TDMxTFS (output)

TDMxTFS (input)

303

305

Valid

Receive

RX_DV

RXDn

RX_ER

803

804

clock

800

802

801

CRS_DV

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