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MSC7119 데이터시트(PDF) 46 Page - Freescale Semiconductor, Inc |
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MSC7119 데이터시트(HTML) 46 Page - Freescale Semiconductor, Inc |
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46 / 60 page ![]() MSC7119 Data Sheet, Rev. 8 Hardware Design Considerations Freescale Semiconductor 46 3.2.2.4 Case 4 The power-up sequence is as follows: 1. Turn on the VDDIO (3.3 V) supply first. 2. Turn on the VDDC (1.2 V), VDDM (2.5 V), and VREF (1.25 V) supplies simultaneously (second). Note: Make sure that the time interval between the ramp-up of VDDIO and VDDC is less than 10 ms. The power-down sequence is as follows: 1. Turn off the VDDC (1.2 V), VREF (1.25 V), and VDDM (2.5 V) supplies simultaneously (first). 2. Turn of the VDDIO (3.3 V) supply last. Use the following guidelines: • Make sure that the time interval between the ramp-up or ramp-down time for VDDC and VDDM is less than 10 ms for power-up and power-down. • Refer to Figure 33 for relative timing for Case 4. Figure 33. Voltage Sequencing Case 4 Time Ramp-down Ramp-up VDDIO = 3.3 V VDDM = 2.5 V VDDC = 1.2 V VREF = 1.25 V <10 ms <10 ms |
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