HD404849FS datasheet(49/127 Pages) RENESAS

49 / 127 page

HD404849 Series

I/O Pin Type

Circuit

Pins

Peripheral

function pins

Input

pins

Input data

INT

0, STOPC

INT

0, STOPC

HLT

MIS3

PDR

SI, etc.

VCC

SI,

INT

1, INT2,

INT

3, EVNB ,

EVND

A/D input

Input control

0–AN 3

HLT

MIS3

PDR

A/D input

Input control

VCC

4–AN 7

Note: The MCU is reset in stop mode, and an peripheral function selections are cancelled. The I/O control

D Port: Consist of nine input/output pins and two input pins addressed by one bit. D

0–D8 are high-current

I/O pins, and D

10 and D11 are input-only pins.

Pins D

0–D8 are set by the SED and SEDD instructions, and reset by the RED and REDD instructions.

Output data is stored in the port data register (PDR) for each pin. All pins of the D port are tested by the TD

and TDD instructions.

The on/off statuses of the output buffers are controlled by D port data control registers (DCD0–DCD2:

$02C–$02E) that are mapped to memory addresses (figure 29).

Pins D

10 and D11 are multiplexed with peripheral function pins STOPC and INT0, respectively.

The

peripheral function modes of these pins are selected by bits 2 and 3 (PMRC2, PMRC3) of port mode

R Ports: 24 input/output pins addressed in 4-bit units. Data is input to these ports by the LAR and LBR

instructions, and output from them by the LRA and LRB instructions. Output data is stored in the port data

port data control registers (DCR0–DCR3, DCR6, DCR7: $030–$033, $036, $037) that are mapped to

memory addresses (figure 29).

HD404849FS 데이터시트(PDF) 49 Page - Renesas Technology Corp

HD404849FS 데이터시트(HTML) 49 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL