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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HD404849FS 데이터시트(PDF) 79 Page - Renesas Technology Corp |
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HD404849FS 데이터시트(HTML) 79 Page - Renesas Technology Corp |
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79 / 127 page  HD404849 Series 77 Bit Initial value Read/Write Bit name 3 0 W ESR23 2 0 W ESR22 0 — — Not used 1 — — Not used Detection edge register 2 (ESR2: $027) ESR23 0 1 ESR22 0 1 0 1 EVND detection edge No detection Falling-edge detection Rising-edge detection Double-edge detection Note: Both falling and rising edges are detected. * * Figure 65 Detection Edge Select Register 2 (ESR2) Notes on Use When using the timer output as PWM output, note the following point. From the update of the timer write register until the occurrence of the overflow interrupt, the PWM output differs from the period and duty settings, as shown in table 27. The PWM output should therefore not be used until after the overflow interrupt following the update of the timer write register. After the overflow, the PWM output will have the set period and duty cycle. |
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