7516 datasheet(14/90 Pages) RENESAS

14 / 90 page

Rev.1.01

Jul 01, 2003

page 14 of 89

7516 Group

Fig. 10 Port block diagram (1)

(5) Ports P04–P07, P1, P45–P47

(7) Port P21

SDA/SCL pin selection bit

(8) Port P22

(4) Port P03

(1) Port P00

(6) Port P20

Port P21

(2) Port P01

P01/SOUT2 P-channel output

disable bit

(3) Port P02

P02/SCLK2 P-channel output disable bit

Direction

Data bus

Port latch

Direction

Data bus

Port latch

Data bus

Port latch

Direction

Data bus

Port latch

Direction

Data bus

Port latch

Direction

Data bus

Port latch

Direction

Data bus

Port latch

Direction

Data bus

Port latch

Direction

Serial I/O2 input

Serial I/O2 transmit completion signal

Serial I/O2 port selection bit

Serial I/O2 output

SRDY2 output enable bit

Serial I/O2 ready output

Serial I/O2 synchronous clock

selection bit

Serial I/O2 port selection bit

Serial I/O2 external clock input

Serial I/O2 clock output

Port XC switch bit

Oscillator

SDA output

SDA input

I2C-BUS interface enable bit

Port XC switch bit

Sub-clock generating circuit input

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