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M66596FP 데이터시트(PDF) 52 Page - Renesas Technology Corp |
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M66596FP 데이터시트(HTML) 52 Page - Renesas Technology Corp |
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52 / 131 page ![]() M66596FP/WG rev .1.00 2006.3.14 page 52 of 127 3.1.7.2 Overview of Clock stop state This controller is equipped with the setting function of the low power consumption state by clock stop as well as M66291, M66591, and M66592. Software is transplantable for this controller from M66291, M66591, and M66592 by fewer changes. In the states where the controller is not communicating such as suspend and a not connect state, low power consumption by clock stop is realized. Correspondence of the state of the controller and the value of a SYSCFG register is shown in Table 3.4. The transitions in the controller state is shown in Figure 3.4.For the timing at which the transitions between the various states take place, and the register control timing, please refer to 3.1.8. Moreover, when you use the low power consumption state by clock stop, please use the auto clock supply function ("ATCKM=1"). Table 3.4 Correspondence betweek the controller state and SYSCFG register value Controller state Values of the various SYSCFG register bits Explanation H/W reset XTAL=00,XCKE=0,RCKE=0,PLLC=0,SCKE=0,ATK CM=0,HSE=0,DPRPU=0,FSRPC=0,PCUT=0,USB E=0 Normal operating state XTAL=xx *1),XCKE=1,RCKE=1,PLLC=x *1),SCKE=1,ATCKM=1,HSE=x *1),DPRPD=x*1),DPRPU=x*1),FSRPC=x,PCUT=0, USBE=1 In this state, the clock is supplied to the controller, and USB communication is enabled. Clock stop state XTAL=xx *1),XCKE=0,RCKE=0,PLLC=0,SCKE=0,ATCKM=1 ,HSE= x *1),DPRPD=x*1),DPRPU=x*1),FSRPC=x*1),PCUT =0,USBE=1 In this state, USB communication is not carried out, such as when communication is suspended or a cable is disconnected. *1) x indicates that the value is set by the user is retained. H/W reset Clock stop Normal operating state Suspend, Detached Resume, Attached Default setting, Attached Figure 3.4 Controller state transitions(Clock stop mode) |
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