전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

M66596FP 데이터시트(PDF) 53 Page - Renesas Technology Corp

부품명 M66596FP
상세설명  ASSP (USB2.0 Dual Function Controller)
PDF  131 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M66596FP 데이터시트(HTML) 53 Page - Renesas Technology Corp

Back Button M66596FP Datasheet HTML 49Page - Renesas Technology Corp M66596FP Datasheet HTML 50Page - Renesas Technology Corp M66596FP Datasheet HTML 51Page - Renesas Technology Corp M66596FP Datasheet HTML 52Page - Renesas Technology Corp M66596FP Datasheet HTML 53Page - Renesas Technology Corp M66596FP Datasheet HTML 54Page - Renesas Technology Corp M66596FP Datasheet HTML 55Page - Renesas Technology Corp M66596FP Datasheet HTML 56Page - Renesas Technology Corp M66596FP Datasheet HTML 57Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 53 / 131 page
background image
M66596FP/WG
rev .1.00
2006.3.14
page 53 of 127
3.1.7.3 Low-power sleep state
The low-power sleep state is set by setting “1” for the PCUT bit of the SYSCFG register. For information on the
sequence in which settings are entered for the low-power sleep state, please refer to Chapter 3.1.8.2 , and for
information on register control timing, please refer to the timing diagram noted later (Figure 3.6 Low-power control
timing diagram).
In the low-power sleep state, of the registers set by software, only registers other than those noted below are
initialized. After returning to the normal operating state, the settings must be re-entered using software. Table 3.5
shows the registers that are not initialized when the controller is in the low-power sleep state.
Table 3.5 Registers that are not initialized in the low-power sleep state
Register
Bit
Description
XTAL
This is retained as system information.
ATCKM
This is retained as system information.
HSE
This is retained as system information.
DCFM
This is retained as system information.
DMRPD
This is retained as system information.
DPRPU
This is retained as system information.
FSRPC
This is retained as system information.
SYSCFG
USBE
This is retained as system information.
PINCFG
LDRV
The state of the output pin drive current settings is retained.
DMAxCFG
DREQA
The polarity of the DREQ0_N pin and the DREQ1_N pin are retained.
VBSE / VBINT
When "VBSE=1", if there was any change to the VBUS signal in the low-power
sleep state, the INT_N pin is asserted and notification is made to the CPU.
INTENB0/
INTSTS0
RSME / RESM
When "RSME=1", if there was any change to the USB data bus in the low-power
sleep state, the INT_N pin is asserted and notification is made to the CPU.
INTENB1/
INTSTS1
BCHGE / BCHG
When "BCHGE=1", if there was any change to the USB data bus in the low-power
sleep state, the INT_N pin is asserted and notification is made to the CPU.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com