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M66596FP 데이터시트(PDF) 8 Page - Renesas Technology Corp |
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M66596FP 데이터시트(HTML) 8 Page - Renesas Technology Corp |
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8 / 131 page ![]() M66596FP/WG rev .1.00 2006.3.14 page 8 of 127 1.5 Pin function configuration Figure 1.3 shows a diagram of the pin function configuration of the controller. CPU bus interface D15-7,D6-1(/AD6-1),D0 A6/ALE,A5-1 CS_N RD_N WR0_N WR1_N MPBUS Interrupt / SOF output INT_N SOF_N DMA interface DREQ0_N DACK0_N DEND0_N DREQ1_N DACK1_N/DSTB0_N DEND1_N Split bus SD7-0 System control RST_N TEST 16 6 Clock XIN XOUT VBUS monitor input VBUS USB interface DP, DM Reference resistance REFRIN M66596 8 2 Figure 1.3 Pin function configuration diagram |
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