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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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M66596FP 데이터시트(PDF) 125 Page - Renesas Technology Corp |
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M66596FP 데이터시트(HTML) 125 Page - Renesas Technology Corp |
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125 / 131 page  M66596FP/WG rev .1.00 2006.3.14 page 125 of 127 4.9.6 DMA access timing(burst transfer, when a multiplex bus is set) 4.9.6.1 DMA burst transfer write timing (CPU multiplex bus setting: DFORM=000) 18 tdis (CTRLH - Dreq) tw (CTRL_B) 48 tsu (D) th (D) 43 44 DREQi_N (i=0, 1) CS_N WR0_N, WR1_N Note 6-1 tsu (DEND) th (DEND) 45 46 DENDi_N (i=0, 1) trec (CTRL_B) tw (cycle) 49 47 tsu (A - ALE) thw (A - ALE) 32 35 AD6-AD1 / D15-D0 Address Address D0 ALE tw (ALE) 36 tdwr (ALE_CTRL) 37 Note 6-3 Dn D1 Address 17 tdis (CTRL - Dreq) 4.9.6.2 DMA burst transfer read timing(CPU multiplex bus setting: DFORM=000) 17 tdis (CTRL - Dreq) tw (CTRL_B) 48 ta (CTRL-D) tv (CTRL-D) 3 4 DREQi_N (i=0, 1) CS_N RD_N Note 6-2 ta (CTRL - DendV) tv (CTRL - DendV) 11 12 DENDi_N (i=0, 1) trec (CTRL_B) tw (cycle) 49 47 tsu (A - ALE) th (A - ALE) 32 35 AD6-AD1 / D15-D0 Address D0 ALE tw (ALE) 36 tdwr (ALE_CTRL) 37 Note 6-3 Dn D1 Address Address Note 6-4 |
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