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SH7261 데이터시트(PDF) 61 Page - Renesas Technology Corp

부품명 SH7261
상세설명  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 데이터시트(HTML) 61 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 2.00 Sep. 07, 2007 Page 29 of 1312
REJ09B0320-0200
2.2.3
Immediate Data Format
Byte (8-bit) immediate data is located in an instruction code. Immediate data accessed by the
MOV, ADD, and CMP/EQ instructions is sign-extended and handled in registers as longword
data. Immediate data accessed by the TST, AND, OR, and XOR instructions is zero-extended and
handled as longword data. Consequently, AND instructions with immediate data always clear the
upper 24 bits of the destination register.
20-bit immediate data is located in the code of a MOVI20 or MOVI20S 32-bit transfer instruction.
The MOVI20 instruction stores immediate data in the destination register in sign-extended form.
The MOVI20S instruction shifts immediate data by eight bits in the upper direction, and stores it
in the destination register in sign-extended form.
Word or longword immediate data is not located in the instruction code, but rather is stored in a
memory table. The memory table is accessed by an immediate data transfer instruction (MOV)
using the PC relative addressing mode with displacement.
See examples given in section 2.3.1 (10), Immediate Data.



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