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SH7261 데이터시트(PDF) 78 Page - Renesas Technology Corp |
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SH7261 데이터시트(HTML) 78 Page - Renesas Technology Corp |
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78 / 1348 page ![]() Section 2 CPU Rev. 2.00 Sep. 07, 2007 Page 46 of 1312 REJ09B0320-0200 Classification Types Operation Code Function No. of Instructions 19 FSCHG SZ bit inversion 48 Floating-point instructions FSQRT Floating-point square root FSTS Floating-point store from system register FPUL FSUB Floating-point subtraction FTRC Floating-point conversion with rounding to integer 2 LDS Load into floating-point system register 8 FPU-related CPU instructions STS Store from floating-point system register 10 BAND Bit AND 14 Bit manipulation BCLR Bit clear BLD Bit load BOR Bit OR BSET Bit set BST Bit store BXOR Bit exclusive OR BANDNOT Bit NOT AND BORNOT Bit NOT OR BLDNOT Bit NOT load Total: 112 253 |
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